Код: module TopLevelModule (in1, in2, addr, clock, reset, out, ready);
input [3:0] in1, in2;
input addr;
input clock;
input reset;
output [3:0] out;
output ready;
wire [3:0] temp_result;
multiplexer MyMux(in1, in2, addr, temp_result);
always @(posedge clock or posedge reset)//synchronous circuit with asynchronous reset
if(reset)
begin
out <= 4'b0;
ready <= 1'b1;
end
else
begin
...
out <= temp_result;
//instance of some lower level module
...
ready <= 1'b1;
end
endmodule | 
